The present invention relates generally to integrated circuit content addressable memory devices.
Advancements in telecommunication technology have led to an increasing number of applications using content addressable memory devices (“CAMs”). A CAM associates an address with data. The data are presented on the inputs of the CAM, which searches for a match with those data stored in the CAM. When a match is found, the CAM identifies the address location of the data. For example, a 2K word by 64-bit CAM array has 128K CAM cells on a matrix of 2048 wordlines and 64 bit datalines. If the 64 bit input data match the 64 bit data stored on any given wordline, a match signal will be returned for that particular wordline.
FIG. 1 shows a typical static random access memory (“SRAM”) based binary CAM cell, indicated generally by the reference numeral 10. Two inverters, INV1 and INV2, form a latch that stores the true and complimentary data on nodes N1 and N2, respectively. In the write mode, data are written into CAM cells through bitlines, BL and bBL, and through NMOS transistors, T1 and T2, respectively. In the precharge phase of the search mode, the matchline is precharged to high. In the evaluation phase of the search mode, input data presented to the CAM are delivered to the CAM cells through searchlines SL and bSL. When there is a match, the two gates in the path of T3 and T4 as well as in the path of T5 and T6 will have different polarity, so that one of the transistors in each path will be off. Thus, there is no current flowing between the matchline and sinkline through a matched CAM cell. On the other hand, when there is a mismatch, one of the two paths will have both transistors turned on and allow current flow between the sinkline and the matchline. The sinkline is normally connected to ground, and thus, will discharge the match line when a mismatch occurs.
In the above example of a 64 bit wide CAM, each matchline is connected to all sixty-four CAM cells 10. When any of the CAM cells shows a mismatch, the matchline will be discharged to ground. If all sixty-four cells have matches, the matchline will stay at the precharged high level and a match will be found.
A typical search cycle will result in a small number of matching words. Thus, all but a small number of matchlines will be discharged for every search cycle. In addition, each matchline connects to all cells in a wordline, thus its capacitance increases as the CAMs get wider. As the size and width of CAMs increase as required by more applications, the conventional CAM architecture has shown decreased operation speed and increased power consumption. The slow search rate (or search clock cycle time) and large power consumption have become a limiting factor in many applications.